1. Field of the Invention
Example embodiments of the present invention relate to a method of forming a pattern and a method of manufacturing a capacitor using the same. More particularly, example embodiments of the present invention relate to a method of forming a conductive pattern using a buffer layer pattern and a method of manufacturing a capacitor using the method of forming a conductive pattern.
2. Description of the Related Art
Generally, a capacitor employed in an electronic device, for example, a dynamic random access memory (DRAM) device, includes a lower electrode, a dielectric layer, and an upper electrode. In order to improve a capacitance of a memory device having the capacitor, it is important to improve an electric capacitance of the capacitor.
Recently, an area of a unit cell of the DRAM device has been reduced as integration of the DRAM device has been increased to have a giga-size. Thus, the capacitor having a flat shape has been manufactured so as to have a great capacitance. However, the shape of the capacitor has been gradually changed into a box shape or a cylindrical shape in order to have a relatively higher aspect ratio.
The cylindrical capacitor includes a lower electrode having a cylindrical shape. A buffer layer pattern may be used in a node-separation process for forming the lower electrode having the cylindrical shape, and examples of a material that may be used for the buffer layer pattern may include an oxide, a photosensitive material, etc.
In order to form a buffer layer pattern including an oxide, the buffer oxide layer is formed through an oxide deposition process, and then the buffer oxide layer is etched through an etch-back process or chemical mechanical polishing process. Accordingly, the process of forming the butter layer pattern requires a relatively long duration of time for the deposition process and the etching process. Additionally, a void may be formed in the buffer layer pattern. An atomic layer deposition process is employed to form a buffer layer pattern without the void.
In order to form the buffer layer pattern including the photosensitive material, a photoresist film is formed. Thereafter, an exposing process, a developing process using a developing solution, a cleaning process, and a baking process are sequentially performed on the photoresist film. Thus, high cost exposure devices are needed for forming the buffer layer pattern. Furthermore, a baking process hardening the photoresist film at a temperature higher than about 270° C. is essentially needed. The photoresist film hardened through the high temperature baking process may not be easily removed through a plasma ashing process.
The lower electrode of the buffer layer pattern may be damaged while the ashing process and the cleaning process are performed. Furthermore, the buffer layer pattern is not easily removed by a conventional ashing process, and a residue of the buffer layer pattern remaining in an opening may serve as a resistance to cause malfunction of the capacitor. In order to improve an efficiency of the ashing process for removing the buffer layer pattern, an oxygen plasma ashing process may be performed at a high temperature of about 150° C. to about 250° C. However, the high temperature ashing process may deteriorate and/or oxidize the lower electrode so that the capacitor does not have a desired electric capacitance.